1. Field of the Invention
The present invention relates to a code sequence generator which generates maximum length sequences or Gold sequences.
2. Description of Related Art
Digital code sequences are used in various fields such as cryptography of digital information, and spreading codes for expanding the signal bandwidth of spread-spectrum communications. In particular, the maximum length sequences (M-sequences) is utilized as a random code or a pseudonoise signal because they have a very long period and their autocorrelational characteristics are impulsive.
Digital codes can be generated by using a register and a calculation circuit performing a calculation on the content of the register, and by feeding the computed results back to the register.
For example, the calculation for generating M-sequences with period 15 can be implemented by a single EXCLUSIVE OR circuit, and a simple feedback circuit as shown in FIG. 1.
In FIG. 1, the reference numeral 1 designates a four stage shift register consisting of four registers R1-R4, and the reference numeral 2 designates an EXCLUSIVE OR circuit EXCLUSIVE-ORing the outputs of the registers R1 and R4. The output of the EXCLUSIVE OR circuit 2 is fed back to the input of the register R1. Each of the resistors R1-R4 is set at an initial value (not all initial values are zero) and the contents of the registers R1-R4 are shifted by a clock signal provided thereto, thereby generating an M-sequence code with period 15.
FIG. 2 shows an M-sequence generator with period 15 arranged by generalizing the generator of FIG. 1. This generator includes four 1-bit registers instead of the shift register 1 of FIG. 1. In FIG. 2, the reference numeral 3 designates a register circuit including four 1-bit registers REG1-REG4, and the reference numeral 4 designates a calculation circuit for performing calculation on the contents of the register circuit 3, and feeds the calculated results back to the register circuit 3. The M-sequence is outputted from the output terminal of the register REG4.
In these M-sequence code generators, let us assume that the generation of a code sequence is started after the state of the register circuit 3 is changed by providing it with a given number of clock pulses. For example, to start generation of a code sequence after providing five clock pulses, the five clock pulses must be quickly applied to the register circuit 3 to place it in the start state. In this case, although it will be easy to generate an M-sequence with period 15 from a desired phase, it will take a much longer time to place a register in a desired start state by providing it with a necessary number of clock pulses in order to generate a code sequence with a much longer period from a desired phase.
Furthermore, to generate a code sequence at every other code sequence, it is required to operate the code sequence generator by a clock signal of the double rate in order to select every other code sequence. Accordingly, generating a code sequence at m-code sequence intervals requires to operate the code sequence generator at a clock rate m times faster than a normal rate. Thus, the conventional code sequence generator requires a higher rate clock signal than the normal rate clock signal.
Thus, the prior art requires a very long time to start generating a code sequence from a desired phase when the period of the code sequence is very long. In addition, a higher rate clock signal is necessary to generate a code sequence at a desired interval that is an integer multiple of the code sequence.